The present invention relates to an active matrix type display device; and, more particularly, the invention relates to a display device which can display pixel memory type multiple gradations having a high aperture ratio and a high definition.
Display Devices of various types using a liquid crystal panel or electroluminescence (especially, an organic EL device) have been put into practice or investigated for commercial development as a display device of a high fineness in producing a color display for a notebook type computer or a display monitor. The display device being used most widely is a liquid crystal display device, which will be described by taking the so-called “active matrix type liquid crystal display device” as a typical example.
In a thin film transistor (TFT) type of active matrix type liquid crystal display device, thin film transistors TFT provided for the individual pixels are used as switching elements for applying signal voltages (or video signal voltages: gradation voltages) to the pixel electrodes. Therefore, no crosstalk occurs between the pixels, so that multiple gradations can be displayed with high definition.
In a case in which a liquid crystal display device of this kind is mounted on an electronic device using a battery as its power source, such as a mobile type information terminal, on the other hand, it is necessary to reduce the power to be consumed for the display. Therefore, many techniques designed to give a memory function to each pixel of the liquid crystal display device have been proposed in the related art.
FIG. 7 is a diagram which shows an example of a liquid crystal panel, in the form of a low temperature poly-silicon thin film transistor type liquid crystal display device having a static RAM of one bit packaged in each pixel. The liquid crystal panel is formed by clamping a liquid crystal material in the gap, across which a first substrate and a second substrate confront each other. In FIG. 7, reference letters PNL designate a liquid crystal panel, in which the first substrate has a vertical scanning circuit GDR and a horizontal scanning circuit DDR in the periphery of a pixel portion (or display area) AR occupying most of the plane of the panel. Each of the pixels of the pixel portion (or pixel array) AR constitutes an image memory (or static RAM: SRAM) of one bit. This liquid crystal panel PNL has a digital-analog conversion circuit (DAC) of four bits or the like packaged in its horizontal scanning circuit DDR, although this is not indispensable.
FIG. 8 is a circuit diagram showing the 1-bit SRAM in FIG. 7 schematically. In FIG. 8: reference letters GL designate a gate line (or scanning line); DL designates a drain line (or signal line); LC designates a liquid crystal; and VCOM designates a common voltage. Reference letters PIX designate a pixel circuit. This pixel circuit PIX is composed of: a switching transistor T1 for fetching a display signal inputted from the drain line DL, on the basis of a scanning voltage applied to the gate line GL; the liquid crystal LC; and a pair of transistors T2 and T3 for fetching and reading the video signal in and from the image memory SRAM. The pixel circuit PIX has an ordinary sampling function to feed gradation analog signals of 4 to 6 bits from the outside, as they are, to the liquid crystal driving electrode, and an image memory function to store data of 1 bit received from the outside once in the SRAM, in response to alternating voltages φp and φn, and to output data conforming to that 1-bit data to the liquid crystal driving electrodes.
The selection of the actions of the sampling function and the image memory function is controlled from the outside. Here, the alternating voltages φp and φn are alternating signals synchronized with the liquid crystal alternating voltage period which alternate in polarities reversed from each other. The voltage φn is indicated to have a waveform reversed from that of the voltage φp. If this pixel configuration is adopted, the electric power to be consumed for writing the data can be reduced by displaying the 1-bit data stored in the SRAM, for example, at a standby time or the like of the mobile telephone.
Here, a display device of the areal gradiation display configuration having a 1-bit memory is disclosed, for example, in Patent Publication 1.
Patent Publication No. 1: JP-A-2002-175040